Chapter 4 | Cache Memory Deeply Explained | COMPUTER ARCHITECTURE | Learn Coding.

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William Stallings Computer Organization and Architecture 10th Edition
Key Characteristics of Computer Memory Systems
◼ Location
◼ Refers to whether memory is internal and external to the computer
◼ Internal memory is often equated with main memory
◼ Processor requires its own local memory, in the form of registers
◼ Cache is another form of internal memory
◼ External memory consists of peripheral storage devices that are
accessible to the processor via I/O controllers
◼ Capacity
◼ Memory is typically expressed in terms of bytes
◼ Unit of transfer
◼ For internal memory the unit of transfer is equal to the number of
electrical lines into and out of the memory module

Memory
◼ The most common forms are:
◼ Semiconductor memory
◼ Magnetic surface memory
◼ Optical
◼ Magneto-optical
◼ Several physical characteristics of data storage are important:
◼ Volatile memory
◼ Information decays naturally or is lost when electrical power is switched off
◼ Nonvolatile memory
◼ Once recorded, information remains without deterioration until deliberately changed
◼ No electrical power is needed to retain information
◼ Magnetic-surface memories
◼ Are nonvolatile
◼ Semiconductor memory
◼ May be either volatile or nonvolatile
◼ Nonerasable memory
◼ Cannot be altered, except by destroying the storage unit
◼ Semiconductor memory of this type is known as read-only memory (ROM)
◼ For random-access memory the organization is a key design issue
◼ Organization refers to the physical arrangement of bits to form words

Memory Hierarchy
◼ Design constraints on a computer’s memory can be summed
up by three questions:
◼ How much, how fast, how expensive
◼ There is a trade-off among capacity, access time, and cost
◼ Faster access time, greater cost per bit
◼ Greater capacity, smaller cost per bit
◼ Greater capacity, slower access time
◼ The way out of the memory dilemma is not to rely on a single memory component or technology, but to employ a memory hierarchy

Cache Addresses
◼ Virtual memory
◼ Facility that allows programs to address memory from a logical point of view, without regard to the amount of main memory physically available
◼ When used, the address fields of machine instructions contain virtual addresses
◼ For reads to and writes from main memory, a hardware memory management unit (MMU) translates each virtual address into a physical address in main memory

Victim Cache
◼ Originally proposed as an approach to reduce the conflict
misses of direct mapped caches without affecting its fast
access time
◼ Fully associative cache
◼ Typical size is 4 to 16 cache lines
◼ Residing between direct mapped L1 cache and the next level of memory

Associative Mapping Summary
◼ Address length = (s + w) bits
◼ Number of addressable units = 2s+w words or bytes
◼ Block size = line size = 2w words or bytes
◼ Number of blocks in main memory = 2s+ w/2w = 2s
◼ Number of lines in cache = undetermined
◼ Size of tag = s bits

Set Associative Mapping
◼ Compromise that exhibits the strengths of both the direct and
associative approaches while reducing their disadvantages
◼ Cache consists of a number of sets
◼ Each set contains a number of lines
◼ A given block maps to any line in a given set
◼ e.g. 2 lines per set
◼ 2 way associative mapping
◼ A given block can be in one of 2 lines in only one set

Set Associative Mapping Summary
◼ Address length = (s + w) bits
◼ Number of addressable units = 2s+w words or bytes
◼ Block size = line size = 2w words or bytes
◼ Number of blocks in main memory = 2
s+w/2
w=2s
◼ Number of lines in set = k
◼ Number of sets = v = 2d
◼ Number of lines in cache = m=kv = k * 2d
◼ Size of cache = k * 2d+w words or bytes
◼ Size of tag = (s – d) bits

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