Two bit Binary Multiplier

Gate level Minimization: K-map using 2 variables in SOP form & AOI Implementation

Boolean Algebra, Basic Theorems & Properties, Boolean functions, Canonical & Standard Form

Digital Logic Gates:Gates realization using basic logic gates and using Universal gate

Digital Logic Gates: Universal Logic Gates: NAND & NOR , Special Gates : XOR & XNOR

Digital Logic Gates : Basic Logic Gates : AND, OR and NOT

Binary Codes: Alphanumeric CodesError Detection & Error Correcting Codes

BinaryCodes: Non-weighted codes: Gray Code

BinaryCodes : Non-Weighted Codes:Excess-3 Codes

BinaryCodes : Weighted Codes : Self Complementing Codes : BCD code

Floating Point Number Representation

Fixed Point Number Representation

Signed binary numbers : 2’s complement approach

Signed binary numbers : One's complement approach

Signed Binary Numbers : Sign Magnitude Approach

Numberconv jiteshShinde

Number System

Sequential circuit : Design & Implementation of 3 bit Asynchronous Up-Down Counter

Two bit Binary Multiplier

Design & Implementation of 8 bit Arithmetic Logic Unit (ALU)

Sequence detector Circuit using Moore Finite State Machine and Algorithmic State Machine Concept

4 bit Ripple Carry Adder Design

D Latch designing in DEEDS Digital Circuit Simulator and Synthesis & Power Analysis in Xilinx

Learn to Design and synthesis without writing HDL code

One Bit Comparator Design implementation in DEEDS Digital Circuit Simulator and Xilinx ise