Versal Embedded Design Tutorial - Debugging with Vitis 2020.2
This Versal Embedded Design Tutorial (EDT) series is an introduction for using the Xilinx® Vivado® Design Suite flow on a VMK180/VCK190 evaluation board. The tools used are Vivado® 2020.2 Design Suite and the Vitis™ 2020.2 unified software. These examples focus on introducing you to the useful aspects of embedded design. This tutorial demonstrates the application debug using Vitis 2020.2 software.
**Video timeline **
0.28 Agenda
0.30 Step 1: Setting up the HW target
1:08 Step 2: Launch Debug Configurations
1:49 Step 3: Application Debug
1:49: Disassembly
2:23: Registers
2:31: Set up the breakpoint
2:52: Step-Into
3:13: Resume
3:34: Run
3:53: Application UART prints
3:57: Debugging Tip
Useful Resources:
Tutorial Link: https://github.com/Xilinx/Embedded-De...
Versal Example Designs https://xilinx-wiki.atlassian.net/wik...
Do you have a technical question? Ask it on the Xilinx Community Forums and get advice from a fantastic community.
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